1. Field of the Invention
The present invention relates to a prediction apparatus for practicing predictive processing of image data to provide encoded image data, an inverse prediction apparatus for practicing inverse predictive processing of the encoded image data to provide decoded image data, and an art related thereto.
2. Description of the Related Art
In the International Telecommunications Union (ITU), an H.26L-coding system has been negotiated for standardization as a next-generation moving picture-encoding system.
In order to provide an enhanced encoding efficiency, the H.26L-coding system includes steps of dividing a frame into small block areas, practicing predictive processing of a candidate prediction block for each block using neighboring pixels around the block, and conducting the entropy encoding of residual information.
A prior art prediction apparatus for providing the predictive processing according to the H.26L-coding system is described with reference to the drawings.
Initially, a prior art prediction apparatus for practicing A-mode predictive processing according to the H.26L-coding system is described with reference to the drawings.
FIG. 27 is a block diagram, illustrating the prior art prediction apparatus. As illustrated in FIG. 27, the prior art prediction apparatus includes a candidate prediction block storage unit 800, a predictive pixel-generating unit 801, a predictive pixel block storage unit 802, a predictive processing wait 803, and a predicted block storage unit 804.
The candidate prediction block storage unit 800 stores a candidate prediction block “B1” and nine pieces of neighboring pixel data {“A” to “I”} adjacent to the candidate prediction block “B1”. The candidate prediction block “B1” consists of sixteen pieces of candidate prediction pixel data {“a” to “p”}.
The predictive pixel-generating unit 801 generates sixteen pieces of predictive pixel data {A ♭, B ♭, C ♭ . . . D, D, D} using the neighboring pixel data “A”, “B”, “C” and “D”. The neighboring pixel data “A”, “B”, “C” and “D” are fed into the predictive pixel-generating unit 801 from the candidate prediction block storage unit 800.
The predictive pixel block storage unit 802 stores a predictive pixel block “B2” that consists of the sixteen pieces of predictive pixel data from the predictive pixel-generating unit 801.
The predictive processing unit 803 receives the sixteen pieces of candidate prediction pixel data {“a” to “p”56 in sequence from the candidate prediction block storage unit 800. The predictive processing unit 803 also receives the sixteen pieces of predictive pixel data {“A ♭” to “D”} in sequence from the predictive pixel block storage unit 802. The predictive processing unit 803 subtracts the predictive pixel data from the candidate prediction pixel data, thereby producing sixteen pieces of predicted pixel data {a−A ♭, b−B ♭, c−C ♭, . . . , n−D, o−D, and p−D}.
The predicted block storage unit 804 stores a predicted block “B3” that consists of the sixteen pieces of predicted pixel data {“a−A” to “p−D”} from the predictive processing unit 803.
The predictive pixel data can be expressed by the following expressions: A ♭=(A+B)/2; B ♭=(B+C)/2; and C ♭=(C+D)/2.
The following discusses in details how the prior art prediction apparatus as discussed above practices the A-mode predictive processing.
FIG. 28 is a detailed block diagram, illustrating the predictive pixel-generating unit 801 of FIG. 27 and the predictive processing unit 803 of FIG. 27. In FIG. 28, the same components as those of FIG. 27 are identified by the same reference numerals, and therefore descriptions related thereto are omitted.
FIG. 28(a) is a detailed block diagram, illustrating the predictive pixel-generating unit 801 of FIG. 27. FIG. 28(b) is a detailed block diagram, illustrating the predictive processing unit 803 of FIG. 27.
As illustrated in FIG. 28(a), the predictive pixel-generating unit 801 includes registers 810, 820, 840, an adder 830, and a shifter 850.
As illustrated in FIG. 28(b), the predictive processing unit 803 includes registers 860, 870, 890, a subtracter 880, and a shifter 900.
The predictive processing is now described in detail by taking the candidate prediction pixel data “a” of FIG. 27 as an example.
As illustrated in FIG. 28(a), the candidate prediction block storage unit 800 reads out the neighboring pixel data “A”, “B”, “C”, and “D” into the registers 810, 820.
The adder 830 adds the neighboring pixel data “A” and “B” together. The neighboring pixel data “A” and “B” are entered through the registers 810 and 820, respectively. As a result, added data “A+B” is provided.
The register 840 receives the added data “A+B” from the adder 830. The shifter 850 in receipt of the added data “A+B” from the register 840 divides the added data “A+B” by two, thereby producing predictive pixel data “A ♭”.
The predictive pixel block storage unit 802 stores the predictive pixel data “A ♭” from the shifter 850. Similarly, other predictive pixel data “B ♭”, “C ♭” are generated. As a result, the predictive pixel block storage unit 802 stores the sixteen pieces of predictive pixel data.
Turning now to FIG. 28(b), the register 860 receives the predictive pixel data “A ♭” from the predictive pixel block storage unit 802.
The register 870 receives the candidate prediction pixel data “a” from the candidate prediction block storage unit 800.
The subtracter 880 subtracts the predictive pixel data “A ♭” from the candidate prediction pixel data “a”. The predictive pixel data “A ♭” and the candidate prediction pixel data “a” come from the registers 860 and 870, respectively. As a result, predicted pixel data “a−A ♭” is provided.
The predicted block storage unit 804 stores the predicted pixel data “a−A ♭” after the predicted pixel data “a−A ♭” is passed through the register 890 and the shifter 900.
In this way, the predictive processing unit 803 produces the remaining predicted pixel data “b−B ♭” to “p−D” in sequence.
The following describes how many operation steps are required for the A-mode predictive processing using the prior art prediction apparatus.
The readout of the neighboring pixel data “A”, “B”, “C”, and “D” involves fours steps. Three steps for addition and three steps for division are required to produce the predictive pixel data “A ♭”, “B ♭”, and “C ♭” using the predictive pixel-generating unit 801.
Sixteen steps are required to store the sixteen pieces of predictive pixel data using the predictive pixel block storage unit 802. Eighteen steps are required to practice the predictive processing using the predictive processing unit 803.
As a result, the A-mode predictive processing using the prior art prediction apparatus involves a total of forty-four operation steps.
The subtracter 880 in the predictive processing unit 803 supports vector instructions. In this case, the number of operation steps is two plus the number of pixels to be processed.
A prior art prediction apparatus for practicing B-mode predictive processing according to the H.26L-coding system is briefly described.
The predictive pixel-generating unit 801 of FIG. 27 is replaced by another predictive pixel-generating unit that includes a multiplier, two adders, and a divider. This replacement realizes the B-mode predictive processing.
More specifically, in B-mode, the predictive pixel-generating unit constructed as described above generates sixteen pieces of predictive pixel data {α, β, γ, δ, ε, α, β, γ, ζ, ε, α, β, η, ζ, ε, and α} using nine pieces of neighboring pixel data {“A” to “I”}.
The predictive processing unit 803 generates sixteen pieces of predicted pixel data {a-α, b-β, c-γ, d-δ, e-ε, f-α, g-β, h-γ, i-ζ, j-ε, k-α, l-β, m-η, n-ζ, o-ε, and p-α}.
The predictive pixel data can be expressed as follows:α=(E+2I+A)//4; β=(I+2A+B)//4; γ=(A+2B+C)//4; δ=(B+2C+D)//4; ε=(F+2E+I)//4; ζ=(G+2F+E)//4; and η=(H+2G+F)//4. The symbol “//” denotes round-off after division.
The following discusses how many operation steps are required for the B-mode predictive processing using the prior art prediction apparatus.
The readout of the nine pieces of neighboring pixel data {“A” to “I”} involves nine steps. Fourteen steps for addition and seven steps for multiplication are required to produce the predictive pixel data “α”, “β”, “γ”, “δ”, “ε”, “ζ”, and “η” using the predictive pixel-generating unit.
Sixteen steps are required to store the sixteen pieces of predictive pixel data using the predictive pixel block storage unit 802. Eighteen steps are required to practice the predictive processing using the predictive processing unit 803.
As a result, the B-mode predictive processing using the prior art prediction apparatus involves a total of seventy-one operation steps.